Julio Sahuquillo Homepage

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I am a Full Professor (Catedrático de Universidad) of  Computer Engineering at Universitat Politècnica de València. I am associated with the DISCA department.

My research interests are in computer architecture, including topics like high performance computing, energy efficiency, GPU architecture and memory subsystem, and cache hierarchy design. Recently, most of my research has focused on real machines with the aim of improving both performance and fairness of recent multicore based commercial machines. Among these topics are: task to core allocation strategies, cache partitioning, regulation of the hardware prefetchers, and architecture-aware scheduling.

I am also excited about the design of systolic arrays, and deep learning applied to configure key architectural parameters.